AI Chip Costs: Is 2/3 of It Memory? Shocking Component Ratio Data Revealed by Epoch
📰 News Summary
- The share of “memory (HBM)” in the cost of AI chips (Nvidia, AMD, Google, Amazon designs) has soared from 52% in 2024 to 63% by the end of 2025.
- During this period, total spending on AI chip-related components will skyrocket from $22 billion to $52 billion, with a significant portion of that increase attributed to memory expenses.
- The cost ratio of the “Logic Die,” responsible for computation, remains stable at about 13-14%, while the share of packaging and ancillary components is relatively decreasing.
💡 Key Points
- HBM (High Bandwidth Memory) Takes the Lead: Of the $30 billion increase in spending for 2025, approximately $20 billion will be related to HBM. This underscores the current dependence of AI advancements on memory performance.
- Decline in Packaging Ratio: The cost of advanced packaging, like CoWoS, is decreasing in share from 19% to 15%.
🦈 Shark’s Eye (Curator’s Perspective)
While many think the heart of AI lies in the “computational units,” the reality is that it’s becoming a “massive lump of memory”! The fact that the memory ratio hits 63% by the end of 2025 indicates that supplying vast amounts of data at high speeds has become the top priority in chip design. In contrast to the stable 13-14% cost ratio of the logic die, it’s crystal clear just how expensive and essential HBM is! If this trend continues, future AI chips will undoubtedly shift towards a more “memory-driven” design!
🚀 What’s Next?
As HBM drives the overall cost increase of chips, we can expect a surge in investments towards architectures that maximize memory efficiency and alternative HBM technologies. Securing the memory supply chain will be the key to dominating the AI landscape!
💬 Haru Shark’s Take
AI isn’t just a glutton; it’s devouring high-end memory (its favorite snack) at an alarming rate! Memory manufacturers must be laughing all the way to the bank! 🦈✨
📚 Terminology Explained
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HBM (High Bandwidth Memory): A type of memory that vertically stacks multiple DRAM chips for super-fast data transfer, essential for AI learning!
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Logic Die: The core part of semiconductors that handles the “computations” in CPUs and GPUs. It’s the heart of computational processing.
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CoWoS (Chip on Wafer on Substrate): A technology that densely packs chips and memory into a single package. It’s well-known as an advanced packaging technique from TSMC.
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Source: Memory has grown to nearly two-thirds of AI chip component costs